Keysight 16860A

Портативные логические анализаторы Keysight серии 16860

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Описание

Портативные логические анализаторы серии 16860 - 16861A, 16862A, 16863A, 16864A - обеспечивают самую высокую в отрасли частоту сбора данных в режиме анализа временных диаграмм в сочетании с глубокой памятью, что позволяет ускорить отладку цифровых систем. Преимуществами новых приборов являются частота сбора данных в режиме анализа временных диаграмм 2,5 ГГц, глубина памяти до 128 млн. выборок, скорость срабатывания системы запуска с частотой до 1,4 ГГц при захвате временных диаграмм и логических состояний, а также опции несимметричных и дифференциальных пробников.

Логические анализаторы Keysight серии 16860A являются самыми высокопроизводительными портативными логическими анализаторами в отрасли, обеспечивая четкое понимание явлений и позволяя решать самые сложные задачи по отладке цифровых систем.

Высокая скорость сбора данных в режиме анализа временных диаграмм и логических состояний в сочетании с глубокой памятью — Захват данных о работе системы (до 128 Мбайт) с высочайшим разрешением для выявления коренных причин возникновения проблемы и признаков неисправностей, далеко отстоящих друг от друга по времени
Целостность сигнала — Быстрое выявление проблемных сигналов благодаря возможности просмотра глазковых диаграмм одновременно по всем каналам
Поддержка пробников и прикладных программ — Настройка системы для решения конкретных задач испытаний благодаря широкому набору опций пробников и специализированному программному обеспечению
Модернизация — Приобретение прибора в конфигурации, соответствующей текущим измерительным задачам, с возможностью модернизации по мере изменения потребностей тестирования

Характеристики

Models	16861A	16862A	16863A	16864A
Channels	34	68	102	136
Max timing sample rate	2.5 GHz full channel/5.0 GHz half channel
Quarter channel timing sample rate	-	10 GHz (Option T10)	-	10 GHz (Option T10)
Max state clock rate	350 MHz standard, 700 MHz (Option 700)
Maximum state data rate	700 Mb/s standard, 1400 Mb/s (Option 700)
Timing zoom	12.5 GHz at 256 K deep
Memory depth	2 Mb standard; 4 Mb, 8 Mb, 16 Mb, 32 Mb, 64 Mb, 128 Mb optional (2x in half-channel timing, 4x in quarter-channel timing)
Probe/signal compatibility	U4200A Series single-ended direct connect probes, 90-pin single-ended and differential probes
16860A Series Logic Analyzer Specifications and Characteristics
State (synchronous) sampling mode
	16861A	16862A	16863A	16864A
Channels	34 (32 data and 2 clock)	68 (64 data and 4 clock)	102 (96 data and 6 clock)	136 (128 data and 8 clock)
Sampling option: Single clock
Clock (clock is on Pod 1)	1	1	1	1
Clock qualifiers	1	3	4	4
Reset qualifier	0	0	0	1
Sampling option: Multiple clocks
Clocks or clock qualifiers	2	4	4	4
Reset qualifier	0	0	0	0
		350 MHz (Base configuration)	700 MHz (Option 700)	350 MHz (Base configuration)
Sampling option		Single clock	Single clock	Multiple clocks
Available clock modes		Master	Master	Master
		Dual sample	Dual sample	Master/slave
				Demux
Maximum state data rate (spec) 1		Captures data up to 350 Mbps on either edge of a clock up to 350 MHz	Captures data up to 700 Mbps on either edge of the clock up to 700 MHz	Captures data up to 700 Mbps on any combination of multiple clocks up to 350 MHz
		Captures data up to 700 Mbps on both edges of a clock up to 350 MHz	Captures data up to 1400 Mbps on both edges of the clock up to 700 MHz
Maximum state clock frequency		350 MHz	700 MHz	350 MHz
Minimum state clock frequency		12.5 MHz (single edge), 6.25 MHz (both edges)	12.5 MHz (single edge), 6.25 MHz (both edges)	0 MHz
Minimum time between active clock edges		1430 ps	715 ps	1430 ps
Maximum trigger sequencer speed		700 MHz	1400 MHz	700 MHz
1. Specification (spec): Represents warranted performance of a calibrated instrument that has been stored for a minimum of 2 hours within the operating temperature range of 5 to 40 °C, unless otherwise stated, and after a 45-minute warm-up period. The specifications include measurement uncertainty.
State mode functional characteristics
	Single clock		Multiple clocks
Minimum setup time	80 ps		250 ps
Minimum hold time	80 ps		250 ps
Minimum data valid window	160 ps		500 ps
Sample position adjustment range	7 ns typical		12 ns typical
Sample position adjustment resolution	20 ps typical		80 ps typical
Minimum state clock pulse width	Single edge: 200 ps		Single edge: 250 ps
Clock qualifier setup time	200 ps		250 ps
Clock qualifier hold time	200 ps		250 ps
RESET clock qualifier setup time	2 ns		N/A
RESET clock qualifier hold time	0 ps		N/A
Minimum slave to master clock time	N/A		350 ps
Minimum master to slave clock time	N/A		150 ps
Minimum slave to slave clock time	N/A		1.43 ns
Time tag resolution	80 ps		80 ps
Maximum time count between stored states	66 days		66 days
Maximum trigger sequence steps	8		16
Trigger sequence step branching	Arbitrary 4-way if/then/else		Arbitrary 4-way if/then/else
Trigger position	Start, center, end or user-defined		Start, center, end or user-defined
Trigger resources	–– 16 patterns evaluated as =, !=, >, >=, <, <= –– 8 double-bounded ranges evaluated as in range, not in range –– 4 edge detectors in timing, 3 in transitional timing –– 1 occurrence counter per sequence level –– 1 timer –– 4 flags –– 1 arm in –– Burst patterns –– Event counters - 2		– 16 patterns evaluated as =, !=, >, >=, <, <= –– 8 double-bounded ranges evaluated as in range, not in range –– 4 edge detectors in timing, 3 in transitional timing –– 1 occurrence counter per sequence level –– 3 timers –– 4 flags –– 1 arm in –– Global counters - 2
Maximum occurrence counter	999,999,999		999,999,999
Maximum range width	64 bits		64 bits
Maximum pattern width	128 bits single label		128 bits single label
Timer range	200 sample clock period to 27 hours		100 ns to 27 hours
Timer resolution	5 ns		5 ns
Timer accuracy	± (8 sample clock period + 2 ns + 0.01%)		± (8 sample clock period + 2 ns + 0.01%)
Timer reset latency	80 sample clock period		80 sample clock period
Timing (asynchronous) sampling mode
Feature		Full channel	Half channel	Quarter channel (Optional on 16862A or 16864A, requires options -700 and -T10
Max sample rate		2.5 GHz	5.0 GHz	10 GHz
Sample period		400 ps to 10 ns	200 ps	100 ps
Memory depth		Up to 128 M	Up to 256 M	Up to 512 M
Timing mode functional characteristics
Minimum data pulse width		1 sample period + 200 ps
Timing interval accuracy
- Within a 16 channel pod		± (1 sample period + 130 ps + 0.01% of time interval reading) 1
- Across 16 channel pods		± (1 sample period + 400 ps + 0.01% of time interval reading) 1
Maximum trigger sequencer speed		2.5 GHz
Maximum trigger sequence steps		8
Trigger sequence step branching		Arbitrary 4-way if/then/else
Trigger position		Start, center, end or user-defined
Trigger resources		16 patterns evaluated as =, !=, >, >=, <, <=
		8 double-bounded ranges evaluated as in range, not in range
		4 edge detectors in timing, 3 in transitional timing
		1 occurrence counter per sequence level
		1 timer
		4 flags
		1 arm in
		Burst trigger
		2 event counters
Trigger resource conditions		Arbitrary Boolean combinations
Trigger actions		Go to
		Trigger and fill memory
		Trigger and go to
		Trigger, send e-mail and fill memory
		Occurrence counter reset
Flag actions		Set
		Clear
		Pulse set
		Pulse clear
Maximum occurrence counter		999,999,999
Maximum range width		64 bits
Maximum pattern width		128 bits single label
Timer range		200 sample clock period to 27 hours
Timer resolution		5 ns
Timer accuracy		± (8 sample clock period + 2 ns + 0.01%)
Timer reset latency		80 sample clock period
Timing zoom (Captured simultaneously with timing or state sampling mode capture)
Timing analysis sample rate		12.5 GHz (80 ps sample resolution)
Timing interval accuracy
- Within a 16 channel block		± (80 ps + 130 ps + 0.01% of time interval reading)
- Between 16 channel blocks		± (80 ps + 400 ps + 0.01% of time interval reading)
Memory depth		256 K samples
Trigger position		Start, center, end or user-defined
Minimum data pulse width		1 sample period + 200 ps
16860 Series Instrument Characteristics
Standard data views
Waveform	Integrated display of data as digital waveforms, analog waveforms imported from an external oscilloscope, and/or as a chart of a bus' values over time
Listing	Displays data as a state listing
Compare	Compares data from different acquisitions and highlights differences
Source code	Displays time-correlated source code and inverse assembly simultaneously in a split display
	Define the trigger event by simply clicking on a line of source code
	Obtain source-code-level views of dynamically loaded software or code moved from ROM to RAM during a boot-up sequence using address offsets
	Requires access to source files via the LAN or instrument hard drive to provide source code correlation
	Source correlation does not require any modification or recompilation of your source code
Eye scan	Displays eye diagrams across all buses and signals simultaneously, allowing you to identify problem signals quickly
Data display
Numeric bases for data display	Binary, hex, octal, decimal, signed decimal (two's complement), ASCII, symbols and processor mnemonics
Symbolic support/object file format compatibility
Number of symbols/ranges	Unlimited (limited only by amount of virtual memory available on 16860 Series logic analyzers)
Object file formats supported	IEEE-695, Aout, Omf86, Omf96, Omf386, Sysrof, ELF/DWARF1 1, ELF/DWARF2 1, ELF/Stabs1, ELF/ Stabs2, ELF/Mdebug Stabs, TICOFF/COFF, TICOFF/Stabs
ASCII	GPA (general purpose ASCII)
User-defined symbols	Specify a mnemonic for a given bit pattern for a label or bus
Available data/file formats
ala	Contains information to reconstruct the display appearance, instrument settings and trace data (optional) that were present when the file was created
xml	Extensible markup language for configuration portability and programmability
csv	CSV (comma-separated values) format for transferring data to other applications like Microsoft Excel
alb	Export logic analyzer data for post-processing. Alb data (module binary format) can be parsed using programming tools
Standard analysis tools
Filter/colorize	Show, hide or color certain samples in a trace for easier identification and analysis
Find (next/previous)	Locate specific data/events in a captured trace
1. Supports C++ name de-mangling.
16860A Series PC characteristics
Operating system	Microsoft Windows 7 embedded (64-bit)
Processor	3 GHz Intel i5 quad core processor
Chipset	Intel Q77
System memory	8 GB
Removable SSD	256 GB
Installed on SSD	Operating system, latest revision of the logic and protocol application software, optional application software ordered with the logic analyzer
16860A Series instrument controls
LCD touch-screen display	Large 38.1-cm (15-in.) touch-screen display makes is easy to view a large number of waveforms or states
Front-panel hot keys	Dedicated hot keys for selecting run mode and disabling touch screen
Front-panel knob	General-purpose knob adjusts viewing and measurement parameters
Keyboard and mouse	USB keyboard and USB mouse
16860A Series video display modes
Touch-screen display standard	Size: 38.1-cm (15-in.)
	Resolution: 1024 x 768
External display	Simultaneous display capability; Front panel and external
16860A Series Interfaces
Peripheral interfaces
Display	One 15-pin XGA connector and one DisplayPort connector
Audio ports	Line in, line out, mic in
USB ports	Two 3.0 ports on rear, two 2.0 ports on front, two 2.0 ports on rear
Connectivity interfaces
LAN	10Base-T, 100Base-T, 1000Base-T
Connector	RJ-45
Interface with external instrumentation
Trigger or arm external devices or receive signals that can be used to arm measurement hardware within the logic analyzer with trigger in/out
Trigger in
Input	Rising edge or falling edge
Action taken	When received, the logic analyzer takes the actions described in the trigger sequence step
Input signal level	± 6 V max
Threshold level	Selectable: ECL, LVPECL, LVTTL, PECL, TTL
	User defined (± 5 V in 50 mV increments)
Minimum signal amplitude	200 mV
Connector	BNC
Input resistance	3.2 kΩ nominal
Trigger out
Trigger	Select one event from the following as the trigger out event: logic analyzer trigger, flag 1, flag 2, flag 3 or flag 4
Mode	Feedthrough
Polarity	Active high
Output signal	VOH (output high level) 2.0 V min
	VOL (output low level) 0.5 V max
Signal load	50 Ω (For good signal quality, the trigger out signal should be terminated in 50 Ω to ground)
Connector	BNC
External reference clock in
	10 MHz ± 0.01%
Signal swing	Minimum 200 mVp-p swing, Maximum 5 Vp-p swing
Connector	BNC
16860A Series Physical Characteristics
Dimensions
16861A, 16862A,	Height 291.57 mm (11.48 in)
16863A, 16864A	Width 450.65 mm (17.74 in) Add 1.25 inches to the width to account for probes that plug into the right side of the instrument
	Depth 456.54 mm (17.97 in)
Power
16861A	100 to 120 V ± 10%, 50/60/400 Hz
	100 to 240 V ± 10% 50/60 Hz
	325 W max
16862A	100 to 120 V ± 10%, 50/60/400 Hz
	100 to 240 V ± 10% 50/60 Hz
	325 W max
16863A	100 to 120 V ± 10%, 50/60/400 Hz
	100 to 240 V ± 10% 50/60 Hz
	325 W max
16864A	100 to 120 V ± 10%, 50/60/400 Hz
	100 to 240 V ± 10% 50/60 Hz
	325 W max
Weight	Max net		Max shipping
16861A	12.5 kg (27.6 lbs)		23.3 kg (51 lbs)
16862A	12.5 kg (27.6 lbs)		23.3 kg (51 lbs)
16863A	12.5 kg (27.6 lbs)		23.3 kg (51 lbs)
16864A	12.5 kg (27.6 lbs)		23.3 kg (51 lbs)
Instrument operating environment
Temperature	Operating 5 °C to 40 °C
	Non-operating -40 °C to +65 °C
	Operating up to 90% relative humidity (non-condensing) at 40 °C
Humidity	Operating up to 90% relative humidity (non-condensing) at 40 °C
	Non-operating up to 90% relative humidity (non-condensing) at 65 °C
Altitude	Operating up to 4000 meters (13,000 ft)
	Non-operating up to 15300 meters (50,000 ft)
Extra notes regarding 16860A Series: 1. Pollution degree 2 2. Installation category II 3. These instruments are intended for use in an indoor lab environment

Документы

Keysight 16860A Specification

2.3 Мб

Описание

Модели

Модели	Описание
16861A	Логические анализаторы 34 каналов, такт. частота до 700 МГц, длина записи до 128 МБ, 12,5 ГГц синхр.
16862A	Логические анализаторы 68 каналов, такт. частота до 700 МГц, длина записи до 128 МБ, 12,5 ГГц синхр.
16863A	Логические анализаторы 102 каналов, такт. частота до 700 МГц, длина записи до 128 МБ, 12,5 ГГц синхр.
16864A	Логические анализаторы 136 каналов, такт. частота до 700 МГц, длина записи до 128 МБ, 12,5 ГГц синхр.

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Keysight 16860A

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